1. Field of the Invention
The present invention relates to an ATM switch, and in particular to an ATM switch provided in a network where traffics of an MPLS (Multi Protocol Label Switching) service and an ATM (Asynchronous Transfer Mode) service coexist.
An ATM technology has been developed as one for constructing a B-ISDN (broadband integrated services digital network) of a next generation. Also, in the Internet which is rapidly expanding at present, the ATM technology capable of offering a quality of service (QoS) is being remarked.
2. Description of the Related Art
FIG. 13 shows a system which is constructed by applying an ATM technology which can offer a quality of service (QoS) to an ATM network as a backbone network accommodating a WAN (Wide Area Network).
In FIG. 13, an ATM network 20 is connected to the Internet and an LAN (Local Area Network) through edge LSR's (Label Switching Routers) 30. In the ATM network 20, ATM switches 50 are provided which are connected to an ATM terminal 40 or the like to transfer an ATM cell.
The edge LSR's 30 have an MPLS function which is one of label switching technologies as means for internetworking the Internet and the LAN with the ATM network 20.
This label switching function is a technology to transfer packets at a high speed without performing a normal routing process by allocating a label to a serial flow of packets and establishing a path from a starting point to an end point. By using such a label switching function a mapping of an IP packet to an ATM cell becomes possible.
Therefore, the IP packet from the Internet is converted into data of the MPLS at the edge LSR 30 and mapped to the ATM cell to be outputted. This cell is transmitted to the ATM switch 50, so that it becomes possible to perform data transfer in the same way as the ATM cell from the ATM terminal 40.
Therefore, it is also possible to call the ATM network 20 in this case the MPLS network. Both are occasionally distinguished from each other respectively as “native ATM network” and “non-native ATM network”.
FIG. 14 shows a schematic system arrangement of the ATM switch 50 shown in FIG. 13, which is composed of line interfaces 1 on the input side and output side, a switch matrix SW for switching a flow of data cells towards these line interfaces 1, and a call processor CP for controlling operations of the switch matrix SW and the line interfaces 1. The call processor CP performs connection settings {circle around (2)} and {circle around (4)} to the line interfaces 1 by a connection setting demand in an MPLS (LDP) message from the edge LSR 30 or an ATM signaling message {circle around (1)} from the ATM terminal 40, and performs a control {circle around (3)} over the switch matrix SW so that data (cells) can pass through an appropriate output line from the line of the input side.
As shown in FIG. 13, there has been no specific bandwidth control technology in the prior art when the MPLS traffic and the ATM traffic coexist in the ATM network 20.
Also, although it has been possible to provide the ATM traffic with a plurality of priorities (as will be described referring to FIG. 2), it has not been possible to provide the MPLS traffic with a plurality of priorities.
Namely, as shown in FIG. 15, when it is attempted to categorize the MPLS traffic according to the priorities into service categories of the ATM cell such as a CBR, a VBR, and a UBR for mapping into QoS field in the cell, there is no other choice than selecting the UBR which offers a best effort service, in order to transfer the IP packet within the ATM network 20 after embedding an area indicating a plurality of priorities of ToS (Type of Service) and the like such as a Diffserv and an Intserv of the IP packet into the area (service class: Class of Service) indicating priorities in the MPLS.
Therefore, since the priority is not considered in the UBR, it has not been possible to provide a plurality of priorities such as CoS1 and CoS2 as shown in FIG. 15 so that it has been disadvantageous that the quality of service (QoS) upon the mapping to the ATM traffic is not guaranteed.